五五字典>英语词典>soft-core翻译和用法

soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的,含蓄的

牛津词典

    adj.

    • 软性色情的;(性描写等)隐晦的,含蓄的
      showing or describing sexual activity without being too detailed or shocking

      柯林斯词典

      • (性描写)非赤裸裸的,较隐晦的
        Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

        双语例句

        • Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
          基于NIOS软核CPU技术的多路电话计费系统的设计与实现
        • NIOS ⅱ soft-core processor is a flexible and efficient embedded processor promoted by Altera Corporation.
          NIOSⅡ软核处理器是Altera公司推出的一款灵活高效的嵌入式处理器。
        • Then, through the embedded soft-core processor technology based on FPGA, entire system the control, and processing and transmission of data of were achieved by using the co-design approach of hardware and software.
          然后,通过基于FPGA的嵌入式软核处理器技术,采用软硬件协同设计的方法,实现对整个系统功能的控制及数据的处理与发送。
        • I distinctly remember my high school self, wide-eyed, poring over the soft-core Starr report with friends.
          我还清楚地记得高中时代的我,睁大了眼睛,和朋友们一起狼吞虎咽地读着《斯塔尔报告》(StarrReport)中那些香艳的内容。
        • Research and Design of Nios ⅱ Soft-core Processor
          NiosⅡ软核处理器的研究与设计
        • In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
          在实际应用中设计者可以将此软核作为通讯模块通过FPGA实现,或者快速搭建现场总线通信系统,实现灵活的CAN总线接口方案。
        • Research and Design of Soft-core IP for AVS Inter Decoder
          AVS帧间解码IP软核的研究与设计
        • First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
          先对灰度量化算法进行了分析和仿真比较,然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。
        • First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
          第一,运用了在单芯片上实现系统功能的设计思想,采用了高性能的软核处理器(NiosIICPU)和IP复用技术,提高了整个系统的运行速度和进一步改进的灵活性。
        • For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
          对于数字部分,在FPGA内构建SOPC系统,嵌入NIOSii软核处理器对整个系统进行控制。